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CPU packaging technology Xiangjie


    CPU chip packaging technology.
   booster cables Advantages and disadvantages of various packaging technologies.
    Chip area and packaging area to improve the packaging efficiency ratio, as close to 1:1.
    Pin should be as short as possible to reduce the delay,battery clip the distance between pins as well, to ensure no interference and improve performance.
    Based on thermal requirements,tow rope the thinner the better package.
    The so-called "CPU packaging technology" is a way to integrated circuits with insulation materials, plastic or ceramic packaging technology. To CPU, for example, we see the actual size and appearance of the CPU core is not really the size and appearance,ratchet tie dowm but the CPU core and other components have been packaged products.

    CPU package is required for the chip, is also essential. Because the chip must be isolated with the outside world to prevent the air of impurities on the chip circuit electrical performance degradation caused by corrosion. On the other hand, packaged chips are easier to install and transport. As packaging technology is good or bad is also a direct impact on their performance chips to play and connected with PCB (printed circuit board) design and manufacturing, so it is essential. Package can also be said that installation of the semiconductor integrated circuit chip with the shell, which not only plays a place, fix, seal, protect the chip and the role of the Thermal Conductivity Zeng Qiang, but also the internal world and external communication chip bridge circuit - chip Contact with the wire connected to pin Packages for these pins then the wire through the printed circuit board to connect to other devices. Thus, for many integrated circuit products, packaging technology is a critical part.

    CPU package currently used mostly for insulation materials, plastic or ceramic packing up, can play a seal and improve the performance of the role of chip heating. As the processor chips are now increasing in frequency, more powerful, more and more pins, the package also constantly changing shape. Packaging is a major consideration:

Chip area and packaging area to improve the packaging efficiency ratio, as close to 1:1
Pin should be as short as possible to reduce the delay, the distance between pins as well, to ensure no interference and improve performance
Based on thermal requirements, the thinner the better package
    As an important part of the computer, CPU's performance directly affects your computer's overall performance. The CPU is also the last step of the manufacturing process the most critical step is to CPU packaging technology, packaging technology, different CPU, there is a big gap in performance. Only high-quality packaging technology to produce the perfect CPU products.

    CPU chip packaging technology:

    DIP package.

    DIP package (DualIn-linePackage), also known as dual in-line packaging, means the form of dual in-line package integrated circuit chip, most small and medium-scale integrated circuits adopt this package, the pin number of general not more than 100. DIP package, the CPU chip has two rows of pins, you need to insert into the structure of a DIP chip socket. Of course, you can solder directly plugged into the same number of holes and geometric arrangement of the circuit board welding. DIP packaged chips from the chip outlet plug should be especially careful not to damage the pin. DIP package structure are: multi-layer ceramic DIP DIP, single-layer ceramic DIP DIP, lead frame DIP (including glass-ceramic sealing type plastic encapsulation structure, low-melting glass ceramic package type) and so on.

    DIP package with the following characteristics:

    1. For the PCB (printed circuit board) on the hole welded, easy to operate.

    2. Chip area and packaging area ratio between the larger, so size is also larger.

    CPU first 4004,8008,8086,8088, etc. have adopted DIP package, through its two rows of pins on the motherboard can be plugged into the slot or soldered onto the motherboard.

    QFP package.

    Chinese meaning of this technology is called a square flat-type package technology (PlasticQuadFlatPockage), the technology of very small distance between the CPU chip, pin, pin very small, generally large-scale or large scale integrated circuits using this package, The pins are generally above 100. CPU when the operation of the technology package, convenience and high reliability; and its smaller package dimensions, parasitic reduction, suitable for high frequency applications; The technology is suitable for SMT surface mount technology is installed in the PCB layout.

    PFP package.

    The technology is called in English the whole PlasticFlatPackage, the Chinese meaning of the flat component for the plastic packaging. Chips using this technology package also will be using SMD technology welded together with the motherboard chipset. SMD chip installed with no hole on the motherboard, the general design of the motherboard has a good surface corresponding pin pad. Alignment of the foot to the corresponding chip pads, welding can be realized with the motherboard. Welding in this way up the chip without special tools if it is difficult dismantled. The technology and techniques similar QFP above, only the appearance of the package shape is different.

    PGA package.

    The technology, also known as pin grid array packaging technology (CeramicPinGridArrauPackage), this technology package from the chip, there are multiple parties inside and outside the lineup of the pin, pin each side along the chip lineup around a certain distance away order, according to the number of how many pins can be bounded by 2 to 5 laps. Installation, will insert a special chip PGA socket. To make it easier CPU installation and removal, starting from the 486 chip, there is a ZIFCPU socket, designed to meet the PGA CPU package installation and removal of the requirement. The technology generally used for more frequent occasions unplugged under.
    BGA package.

    BGA technology (BallGridArrayPackage) or ball grid array packaging technology. The emergence of this technology will become the CPU, motherboard and South Bridges chip high-density, high performance, multi-pin package, the best choice. But the BGA package substrate area occupied by relatively large. Although the technology I / O pin count increases, but much larger than the distance between pin QFP, thereby increasing assembly yields. And that the technology uses a controlled collapse chip welding method, which can improve its electrical performance. In addition the technology of the assembly can be welded, which can greatly increase the reliability of the package; and technology package by the CPU signal transmission delay is small, the frequency can be improved to adapt to much.

    BGA package has the following characteristics:

    1.I / O pin count, although increased, but much larger than the distance between pin QFP packages, improved yield.

    2. Although the BGA power increase, but is controlled collapse chip used in welding method, which can improve the electric performance.

    3. Signal transmission delay is small, meet the greatly increased frequency.

    4. Coplanar assembly can be welded, and reliability are increased.

    Currently the more common packages:

    OPGA package.

    OPGA (OrganicpingridArray, organic pin array).

    This package substrate using a glass fiber, similar to the printed circuit board material. Such packages can reduce the resistance and package costs. OPGA external capacitor package closer the distance between the processor cores can better improve the core power supply and filter current clutter. AMD's AthlonXP series CPU most of the use of such packages.

    mPGA package.

    mPGA, micro PGA package, only AMD's Athlon64 and Intel's Xeon (Xeon) series CPU and a few other products used, and more is more high-end products, is the kind of advanced packages.

    CPGA package.

    CPGA is often said that the ceramic package, all called CeramicPGA. Mainly in the Thunderbird (Thunderbird) core and the "Palomino" core Athlon processors used.

    FC-PGA package.

    FC-PGA package is a Flip Chip Pin Grid Array acronym, this package have pin wall socket. These chips are reversed, and even film-mode or form part of the computer processor chips to be exposed to the top of the processor. Exposed by the film mode, so the heat can be used directly on-chip solutions for mold, so that the chip can be more efficient cooling. In order to cut off power supply signal and ground through the signal to improve the performance package, FC-PGA processor in the processor at the bottom of the capacitor placement area (central processor) security have discrete capacitors and resistors. Chip at the bottom of the pin is the jagged array. In addition, the pin arrangement means that the processor can only be inserted in a socket. FC-PGA package for the Pentium III and Intel Celeron processors, which use 370 pins.

    FC-PGA2 package.

    FC-PGA2 FC-PGA package and the package type is similar, except these processors also have an integrated heat sink (IHS). Integrated heat sink is installed at the factory directly to the processor chip on. As the IHS and the film has good thermal contact with mold and provide a greater surface area to better divergence of heat, so it significantly increased the thermal conductivity. FC-PGA2 package for the Pentium III and Intel Celeron processor (370 pins) and the Pentium 4 processor (478 pins).

    OOI Package.

    OOI is short for OLGA. OLGA represents the grid array. OLGA chips also use the reverse chip design, including processor down attached to the substrate, to achieve better signal integrity, more efficient cooling and lower self-induction. OOI an integrated thermal device (IHS), to help pass the correct installation of the heat radiator fan radiator. OOI for Pentium 4 processors, these processors have 423 pins.

    PPGA package.

    "PPGA" all in English as "PlasticPinGridArray", is a plastic pin grid array of short, these processors have pins inserted socket. In order to improve thermal conductivity, PPGA processor at the top of the nickel-plated copper radiator used. Chip at the bottom of the pin is the jagged array. In addition, the pin arrangement means that the processor can only be inserted in a socket.

    S.E.C.C. package.

    "SECC" is "SingleEdgeContactCartridge" abbreviation stands for unilateral contact card box. To connect with the motherboard, the processor is inserted into a slot. It does not use pins, but use the "finger" contact, the processor uses these contacts to deliver the signal. SECC is covered with a metal shell, the shell covering the top of the cartridge components.

    The back of the card cage is a hot material coating, to act as a radiator. SECC internal, most processors have a known substrate of printed circuit board connection from processor, secondary cache and bus termination circuit. SECC package with 242 for Intel Pentium II processor, contacts and 330 contacts Pentium II Xeon and Pentium III Xeon processors.

    S.E.C.C.2 package.

    SECC2 SECC package with similar packaging, in addition to SECC2 use less packaging and protective coating does not contain heat. SECC2 package for some later versions of the Pentium II and Pentium III processor (242 contacts).

    S.E.P. package.

    "SEP" is "SingleEdgeProcessor" the abbreviation is short for unilateral processor. "SEP" package similar to the "SECC" or "SECC2" package, is inserted into the Slot with unilateral slot to slot contacts with finger, but it does not cover the whole package, the bottom floor is visible from the processor circuit of. "SEP" package used in the early 242 cheat IntelCeleron processor.

    PLGA package.

    PLGA is PlasticLandGridArray acronym, that is, plastic pad grid array package. In the absence of use of pins, but the use of that small point-style interfaces, Suo Yi Ming Xian PLGA package than before the FC-PGA2 Deng package has a smaller size, less the Xinhaozhuanshu losses and lower the production cost can be effectively deal with the signal strength, enhance the processor frequency, but also can improve the processor production yield, reduce production costs. Currently the company Socket775 Intel CPU interface with this package.

    CuPGA package.

    CuPGA is LiddedCeramicPackageGridArray acronym, that is a covered ceramic grid array package. Common ceramic package with the largest difference is the addition of a roof, to provide better cooling performance and to protect the CPU core from damage. AMD64 CPU family currently use this package.

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